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The first purpose of this paper is to propose a scalable video coding scheme providing flexibility in video transmission, especially under wireless environment. The second purpose is to analyze the problem of lengthening the key frame interval in distributed video coding (DVC), and propose an approach to improve the rate‐distortion (RD) performance of DVC for long group‐of‐frames (GOF) size.

In the proposed scheme, a base layer is first obtained from an H.264 coder. When a DVC coder is then used to code the enhancement layer, information in processing the base layer is extracted and analyzed to make multiple side‐information available and reduce error accumulation for DVC coding, thus further improving the performance of the DVC coder.

By dividing video into base and enhancement layers, the combined video coding architecture enables a flexible video transmission. In addition, several methods are used to improve the RD performance in DVC coding. Simulation shows that the proposed scheme outperforms non‐scalable DVC for long GOF size.

Prediction from the decoding loop in base layer encoder largely reduces enhancement layer spatial redundancy. Multiple side‐information provides better estimation for DVC reconstruction. Long prediction loop is more reliable because error accumulation is effectively compensated.

This paper aims to review recent advances and applications of abrasive processes for microelectronics fabrications.

More than 80 patents and journal and conference articles published recently are reviewed. The topics covered are chemical mechanical polishing (CMP) for semiconductor devices, key/additional process conditions for CMP, and polishing and grinding for microelectronics fabrications and fan-out wafer level packages (FOWLPs).

Many reviewed articles reported advanced CMP for semiconductor device fabrications and innovative research studies on CMP slurry and abrasives. The surface finish, sub-surface damage and the strength of wafers are important issues. The defects on wafer surfaces induced by grinding/polishing would affect the stability of diced ultra-thin chips. Fracture strengths of wafers are dependent on the damage structure induced during dicing or grinding. Different thinning processes can reduce or enhance the fracture strength of wafers. In the FOWLP technology, grinding or CMP is conducted at several key steps. Challenges come from back-grinding and the wafer warpage. As the Si chips of the over-molded FOWLPs are very thin, wafer grinding becomes critical. The strength of the FOWLPs is significantly affected by grinding.

This paper attempts to provide an introduction to recent developments and the trends in abrasive processes for microelectronics manufacturing. With the references provided, readers may explore more deeply by reading the original articles. Original suggestions for future research work are also provided.